1. Field of the Invention
The present invention relates to a semi-insulating InP substrate, a fabrication method of semiconductor thin film, and a semiconductor optical device fabricated by using the method.
2. Description of the Related Art
A semiconductor device fabricated on a semi-insulating substrate such as a semiconductor laser, a semiconductor optical modulator, a monolithically integrated laser and modulator can perform high speed modulation since device capacitance of such a semiconductor device is smaller than that of a semiconductor device fabricated on an n-type substrate or a p-type substrate. Therefore, the semiconductor optical device fabricated on the semi-insulating semiconductor substrate is indispensable for realizing a high capacity optical transmission system.
Generally, these semiconductor devices have a structure in which an about 2 xcexcm-width mesa stripe is buried with a semi-insulating semiconductor or stacked layers including a pn-junction. The mesa stripe is formed by stacking an n-type semiconductor crystal layer, a nondoped semiconductor crystal layer and a p-type semiconductor crystal layer in this order (refer to Japanese laid open patent application No. 11-24020, for example).
However, when adopting this layer structure, device resistance can not be decreased, because a p-electrode with larger contact resistance than that of an n-electrode must be used as a top electrode. Since an area of a top electrode with a narrow stripe pattern is smaller than that of a bottom electrode, a resistance of the device with a p-type top electrode is larger than that of the device with a p-type bottom electrode. Therefore, good device performance can not be obtained.
The reason for forming the n-type semiconductor layer adjacent to the semi-insulating substrate is to avoid inter-diffusion between Zn and Fe which is widely used as a semi-insulating impurity for InP. More specifically, the reason is that, if a Zn-doped semiconductor crystal layer is grown on a Fe-doped semi-insulating substrate, inter-diffusion between Fe and Zn occurs so that concentration of p-type dopant decreases and the semi-insulating property of the substrate degrades. The p-type impurity that causes inter-diffusion between the p-type impurity and Fe is not limited to only Zn. Other p-type impurities such as Be, Cd, and Mg cause similar inter-diffusion.
To solve this problem, Japanese laid open patent application No. 2000-332287 discloses a technology in which a buffer layer is inserted between the semi-insulating substrate and the Zn-doped semiconductor layer for preventing the inter-diffusion. As examples of the buffer layer, a low concentration p-type layer and a low concentration semi-insulating doping layer are disclosed. That is, inter-diffusion is prevented by lowering the concentration of the p-type impurity or the semi-insulating impurity.
However, this structure includes the following problems. As shown in FIGS. 2 and 4, and the corresponding descriptions in the Japanese laid open patent application No. 2000-332287, when a low concentration p-type layer is used for preventing inter-diffusion, the p-type dopant concentration must be adjusted to about 1xc3x971015 cmxe2x88x923. When a low concentration semi-insulating doping layer is used, the dopant concentration must be adjusted to about 5xc3x971015 cmxe2x88x923.
If the dopant concentration increases to about 1xc3x971016 cmxe2x88x923, the amount of diffusion of the dopant increases to the extent that device performance degrades. However, since it is difficult to control doping concentration accurately at a low concentration region, it is difficult to fabricate high performance devices by high yield with good reproducibility. More specifically, when inserting the low concentration p-type layer as the buffer layer, depletion in the low concentration p-type layer occurs, and the conductivity of a part of the semi-insulating substrate becomes a p-type due to diffusion of the p-type dopant. As a result, parasitic capacitance increases, and, since a low-resistive layer is formed in the substrate, leakage currents increase, and, there is a problem in that complete electrical isolation of the devices are not obtained. In addition, when diffused p-type dopant reaches the active region of the device, performance of the device directly degrades. In the same way, when the low concentration semi-insulating doping layer is inserted as the buffer layer, the conductivity of a part of the semi-insulating substrate becomes p-type, and performance of the device degrades due to diffusion of the p-type dopant. As a result, there occurs a problem in that parasitic capacitance increases, and complete electrical isolation of the devices are not obtained.
As for the low concentration semi-insulating doping layer, the Japanese laid open patent application 2000-332287 discloses that a layer to which Ru is doped at a low concentration is used as the buffer layer for preventing inter-diffusion of dopants between the semi-insulating substrate and the p-type semiconductor layer. However, the doping concentration for the semi-insulating layer is equal to or below 1xc3x971016 cmxe2x88x923 according to the Japanese laid open patent application 2000-332287. As is described in A. Dadger et al., Applied Physics Letters 73, No 26 pp 3878-3880 (1998), for example, it is known that the ratio of electronically activated Ru atoms that compensate for electrons to the doped Ru atoms in the semiconductor layer is about 6%. Therefore, when the doping concentration of Ru in the semiconductor layer is 1xc3x971016 cmxe2x88x923, the concentration of the activated Ru atoms that compensate for electrons is about 6xc3x971014 cmxe2x88x923. However, since the concentration of electrons in a nondoped InP layer is usually from 1xc3x971015 cmxe2x88x923 to 1xc3x971016 cmxe2x88x923, it is difficult to obtain the semi-insulating InP layer by using the Ru doping concentration of 1xc3x971016 cmxe2x88x923. Therefore, the semiconductor layer with low Ru concentration of 1xc3x971016 cmxe2x88x923 or less does not have a complete semi-insulating property, so that the conductivity of the low Ru concentration semiconductor layer may become n-type, which may cause an increase of parasitic capacitance and leakage currents, and degradation of device performance.
Recently, it has been found that a Ru-doped InP layer is semi-insulating, and that, inter-diffusion between Zn and Ru does not occur when a Ru-doped semi-insulating InP crystal layer is grown on a Zn-doped semiconductor crystal layer by using the MOVPE (Metalorganic Vapor Phase Epitaxy) method (A. Dadger et al., Applied Physics Letters 73, No 26 pp 3878-3880 (1998)).
Generally, Fe, as a semi-insulating dopant, is used for fabricating a semi-insulating InP substrate. The semi-insulating InP substrate is obtained by growing an ingot 2 inches in diameter using the LEC (Liquid Encapsulated Czochralski) method, and by slicing the ingot.
However, a Ru-doped semi-insulating substrate has not been obtained. In addition, a semi-insulating substrate on which a Ru-doped semiconductor layer that has a complete semi-insulating property is formed has not be obtained.
The semiconductor layer that has a complete semi-insulating property is defined to be a semiconductor layer in which an electron compensator is doped at a concentration higher than the concentration of electrons in the semiconductor layer so that the semiconductor layer has a semi-insulating property. In this definition, the electron compensator is the active Ru that acts as the electron compensator.
In addition, it has not been reported that a semiconductor optical device is formed on a Ru-doped semiconductor layer that has a complete semi-insulating property.
An object of the present invention is to solve a problem caused by forming a p-type semiconductor layer on the Fe-doped semi-insulating InP substrate.
In the present invention, a semi-insulating InP substrate with a new structure, a method for forming a p-type semiconductor layer on the semi-insulating substrate, and a semiconductor optical device fabricated by using the method are proposed.
The above-mentioned object can be achieved by a semi-insulating substrate comprising:
a substrate;
a Ru-doped semi-insulating semiconductor layer that is formed on the substrate; and
wherein the Ru-doped semi-insulating semiconductor layer has a complete semi-insulating property.
The semiconductor layer that has a complete semi-insulating property is defined to be a semiconductor layer in which an electron compensator is doped at a concentration higher than the concentration of electrons in the semiconductor layer so that the semiconductor layer has a semi-insulating property. In this definition, the electron compensator is the active Ru that acts as the electron compensator.
In the semi-insulating substrate the substrate may be a Fe-doped semi-insulating InP substrate; and the Ru-doped semi-insulating semiconductor layer may be a Ru-doped semi-insulating InP layer.
In addition, in the semi-insulating substrate, the substrate may be a Fe-doped semi-insulating InP substrate; and the Ru-doped semi-insulating semiconductor layer may be a Ru-doped semi-insulating InAlAs layer, or a Ru-doped semi-insulating InGaAs layer, or a Ru-doped semi-insulating InGaAlAs layer, or a Ru-doped semi-insulating InGaAsP layer.
The above-mentioned object is also achieved by a semiconductor optical device comprising at least a p-type semiconductor layer, a nondoped semiconductor layer and an n-type semiconductor layer, which are stacked in this order on a semi-insulating substrate;
the semi-insulating substrate comprising:
a substrate;
a Ru-doped semi-insulating semiconductor layer that is formed on the substrate; and
wherein the Ru-doped semi-insulating semiconductor layer has a complete semi-insulating property.
The above-mentioned object is also achieved by a fabrication method of semiconductor thin film, comprising the steps of:
forming a Ru-doped semi-insulating semiconductor layer on a Fe-doped semi-insulating InP substrate, wherein the Ru-doped semi-insulating semiconductor crystal layer has a complete semi-insulating property; and
forming a semiconductor crystal growth layer to which a p-type impurity is doped.
That is, in the present invention, a Ru-doped InP layer or a Ru-doped alloy semiconductor crystal layer such as InGaAsP, InGaAs, InGaAlAs and InAlAs which are lattice-matched to InP is formed between a Fe-doped semi-insulating substrate and a p-type impurity doped semiconductor layer in order to prevent inter-diffusion between Fe and p-type impurity.
The Ru doping concentration means a concentration of Ru atoms incorporated into the semiconductor crystal, and this concentration is different from that of active Ru which acts as an electron compensator.
Normally, the activation ratio of Ru is about 6% in a (100) oriented semiconductor crystal.
The present invention is contrived by using a unique characteristic of Ru in that, Ru is an impurity for making the semiconductor crystal, such as InP, semi-insulating, and that, inter-diffusion between Ru and the p-type impurity does not occur even when Ru is doped at a high concentration. Therefore, the Ru-doped semiconductor layer of the present invention is different from the buffer layer disclosed in the Japanese laid open patent application No. 2000-332287. In the present invention, Ru is doped at a high concentration such that the InP layer has a complete semi-insulating property. On the other hand, the semi-insulating impurity is doped at a low concentration in the conventional technology. This is one of the different points between the present invention and the conventional technology. Therefore, according to the present invention, the Ru-doped InP layer has a complete semi-insulating property, and inter-diffusion between Ru and the p-type impurity does not occur, so that a stable, highly resistive layer can be realized. Thus, a high performance device without leakage currents can be obtained.
According to the present invention, the following effects can be obtained.
Since the Ru-doped InP layer is semi-insulating and inter-diffusion between a p-type impurity such as Zn and Ru does not occur, a semi-insulating substrate with a stable highly resistive layer can be realized. In addition, even when a high concentration p-type semiconductor layer is directly formed on the semi-insulating semiconductor substrate, resistivity of the substrate is not lowered and conductivity of the p-type semiconductor layer is not lowered.
In addition, a Ru-doped alloy semiconductor crystal layer such as Ru-doped InGaAsP, Ru-doped InGaAs, Ru-doped InGaAlAs and Ru-doped InAlAs is also semi-insulating, and inter-diffusion between a p-type impurity such as Zn and Ru does not occur if these Ru-doped alloy layers are formed on the semi-insulating substrate. Thus, a stable semi-insulating substrate with a highly resistive layer can be realized. Further, even when a high concentration p-type semiconductor layer is formed directly on the semi-insulating semiconductor substrate, resistivity of the substrate is not lowered and conductivity of the p-type semiconductor layer is not lowered.
Therefore, the substrate in which the Ru-doped layer is formed on the Fe-doped semi-insulating InP substrate can be used as a semi-insulating substrate. In addition, even when a semiconductor layer which includes a p-type dopant such as Zn is formed on the semi-insulating substrate, inter-diffusion between Ru and the p-type dopant does not occur.
Similarly, when the semiconductor layer that includes the p-type dopant such as Zn is formed after the Ru-doped layer is formed on the Fe-doped semi-insulating InP substrate, inter-diffusion between Ru and the p-type dopant does not occur.
Further, as mentioned above, as for a semiconductor optical device formed by stacking at least a p-type semiconductor layer, a nondoped semiconductor layer and an n-type semiconductor layer on the semi-insulating InP substrate with the Ru-doped layer on the substrate, inter-diffusion between Ru and the p-type dopant does not occur. Therefore, since the device can be formed such that the p-electrode with a large area can be placed as a bottom layer, and an n-electrode with a small area can be placed as a top layer, resistivity can be decreased and good performance can be obtained.